1. Field of the Invention
The present invention relates to a data output circuit in a CMOS-LSI (complementary MOS type large-scale integrated circuit) and, more particularly, to output circuits used in LSIs required for exchanging a signal between the LSIs at a high speed.
2. Description of the Related Art
In a conventional method, since an output from an LSI formed by a CMOS process is driven by a CMOS driver, it has an amplitude between a ground voltage V.sub.SS of 0 V and a power source voltage V.sub.cc of several volts. An LSI having a bipolar transistor outputs a TTL-level signal when the internal circuit of the LSI consists of a TTL (transistor-transistor logic) gate, and the LSI outputs an ECL-level signal when the internal circuit of the LSI consists of an ECL (emitter-coupled logic) gate. In recent years, in order to drive a CMOS device at a high speed, a circuit for obtaining an ECL-level output signal from the CMOS device is arranged. The circuit is described in, e.g., "CMOS subnanosecond true-ECL level output buffer", E. Seereinck, J. Dikken, and H. J. Schnmacher, VLSI SYMPOSIUM, 1989, p. 13. "A CMOS to 100 K ECL Interface Circuit", P. Metz, ISSCC, 1989, p. 226. and "A 2-.mu.m CMOS Digital Adaptive Equalizer Chip for QAM Digital Radio Mode", S. R. Meier et al, IEEE Journal of Solid-State Circuits, Vol. 23, No. 5, 1988.
A CMOS device will be continuously used as a major LSI due to its low power consumption. However, since a CMOS-level output (amplitude between V.sub.SS and V.sub.cc) has a large amplitude, when a CMOS device is switched at a high speed, it generates large noise due to an influence of an inductance component on its mounting board. In the future, therefore, a CMOS device will not be suitable for designing a high-speed system.
On the other hand, since TTL- and ECL-level outputs have small amplitudes, even when a device is switched at a high speed, noise is rarely generated to make it easy to design a high-speed system. In practice, a device such as a cache memory requiring a high-speed operation has an ECL-level interface. However, since an ECL gate consisting of a bipolar transistor has high current consumption, a special-purpose package having a fin for suppressing an increase in temperature of a heat sink is disadvantageously required. In addition, although a TTL gate has current consumption lower than that of the ECL gate, it consumes a current larger than that of a CMOS device.
Although various methods of outputting an ECL-level signal from a CMOS circuit have been proposed, none of the methods satisfies requirements for operation speeds and current consumption.